Computing systems typically employ memory. A memory may include any system, device, or apparatus configured to retain program instructions and/or data for a period of time (e.g., computer-readable media). Memory may include random access memory (RAM), electrically erasable programmable read-only memory (EEPROM), a PCMCIA card, flash memory, magnetic storage, opto-magnetic storage, or any suitable selection and/or array of volatile or non-volatile memory.
As memory technology improves, memory devices execute at ever-increasing speeds. At such speeds, variability introduced by voltage and temperature variations in a memory may lead to undesired performance in a memory. FIG. 1 illustrates an example of such undesired performance. The left-hand side of FIG. 1 depicts various signal waveforms in a memory under “normal” operating conditions. A clock signal, indicated by “CLOCK” may be utilized as a periodic signal to latch data for storage in memory. For example, a memory may latch data for storage on a rising edge of a clock signal, indicated by an upward-pointing arrow in FIG. 1. Accordingly, it is desirable that at such rising edge of CLOCK, any data signal (e.g., D[0], D[1], . . . D[N−1]) to be latched is at either its high or low signal level (e.g., high voltage corresponding to logic 1, low voltage corresponding to logic 0) as shown in the left-hand side of FIG. 1, and not in transition between the two signal levels, as shown in the right-hand side of FIG. 1.
Existing approaches to account for voltage and temperature variations in memory have shortcomings. For example, one approach involves temporarily ceasing memory operation to perform a dynamic calibration to in order to realign data signals and clock signals. However, this approach may be undesirable as it requires a temporary cessation of memory operation. Another approach involves using the N-side of the differential clock input to monitor the phase shift change on data signals due to voltage and temperature variations. The N-side of the clock is often used to capture the falling edge data, but can be used for other purposes. This approach does not require cessation of memory operation, but has its own disadvantages.